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Preliminary Specifications: Programmed Data Processor Model Three Part 3

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The number in octal digits 7 through 11 of the instruction word is added to the C(x). This addition is done in the 15 bit Index Adder using 1's complement arithmetic. If, after the addition, the sum is negative, the Program Counter is advanced one extra position and the next instruction in the sequence is skipped. The contents of octal digits 0-5 of the index register location are unaffected by this instruction.

_Skip on Positive index_ (10 usec.) spx x Y Operation Code 44

The number in octal digits 7 through 11 of the instruction word is added to the C(x). This addition is done in the 15 bit Index Adder using 1's complement arithmetic.

If, after the addition, the sum is positive, the Program Counter is advanced one extra position and the next instruction in the sequence is skipped. The contents of octal digits 0-5 of the index register location are unaffected by this instruction.

_Load Index Register_ (10 usec.) lir x Y Operation Code 14

The octal digits 7 through 11 (Y) of the instruction will replace the corresponding digits of the memory register specified by x. Octal digit 6 of the memory register will be left clear. Digits 0-5 of the memory register are unchanged.

_Deposit Index Adder_ (10 usec.) dia x Y Operation Code 16

The C(IA) replace the octal digits 7 through 11 of memory location Y.

Octal digit 6 of Y is cleared. Digits 0 through 5 of Y are left unchanged. The x portion of the instruction is ignored.

Non-Memory Instructions

Rotate and Shift Group

This group of instructions will rotate or shift the Acc.u.mulator and/or the In-Out Register. When the two registers operate combined, the In-Out Register is considered to be a 36 bit magnitude extension of the right end of the Acc.u.mulator.

Rotate is a non-arithmetic cyclic shift. That is, the two ends of the register are logically tied together and information is rotated as though the register were a ring.

Shift is an arithmetic operation and is in effect multiplication of the number in the register by 2^{+N}, where N is the number of shifts. Shift or rotate instructions involving more than 33 steps can be used for simulating time delays. 36 rotate steps of the Acc.u.mulator will return all information to its original position.

_Rotate Acc.u.mulator Right_ (13 usec. maximum for 36 shifts) rar N Operation Code 671

This instruction will rotate the bits of the Acc.u.mulator right N positions, where N is octal digits 7-11 of the instructions word.

_Rotate Acc.u.mulator Left_ (13 usec. maximum for 36 shifts) ral N Operation Code 661

This instruction will rotate the bits of the Acc.u.mulator left N Positions, where N is octal digits 7-11 of the instruction word.

_Shift Acc.u.mulator Right_ (13 usec. maximum for 36 shifts) sar N Operation Code 675

This instruction will shift the contents of the Acc.u.mulator right N positions, where N is octal digits 7-11 of the instruction word.

_Shift Acc.u.mulator Left_ (13 usec. maximum for 36 shifts) sal N Operation Code 665

This instruction will shift the contents of the Acc.u.mulator left N positions, where N is octal digits 7-11 of the instruction word.

_Rotate In-Out Register Right_ (13 usec. maximum for 36 shifts) rir N Operation Code 672

This instruction will rotate the bits of the In-Out Register right N positions, where N is octal digits 7-11 of the instruction word.

_Rotate In-Out Register Left_ (13 usec. maximum for 36 shifts) ril N Operation Code 662

This instruction will rotate the bits of the In-Out Register left N positions, where N is octal digits 7-11 of the instruction word.

_Shift In-Out Register Right_ (13 usec. maximum for 36 shifts) sir N Operation Code 676

This instruction will shift the contents of the In-Out Register right N positions, where N is octal digits 7-11 of the instruction word.

_Shift In-Out Register Left_ (13 usec. maximum for 36 shifts) sil N Operation Code 666

This instruction will shift the contents of the In-Out Register left N positions, where N is octal digits 7-11 of the instruction word.

_Rotate AC and IO Right_ (13 usec. maximum for 36 shifts) rcr N Operation Code 673

This instruction will rotate the bits of the combined register right in a single ring N positions, where N is octal digits 7-11 of the instruction word.

_Rotate AC and IO Left_ (13 usec. maximum for 36 shifts) rcl N Operation Code 663

This instruction will rotate the bits of the combined register left in a single ring N position, where N is octal digits 7-11 of the instruction word.

_Shift AC and IO Right_ (13 usec. maximum for 36 shifts) scr N Operation Code 677

This instruction will shift the contents of the combined register right N positions, where N is octal digits 7-11 of the instruction word.

_Shift AC and IO Left_ (13 usec. maximum for 36 shifts) scl N Operation Code 667

This instruction will shift the contents of the combined registers left N positions, where N is octal digits 7-11 of the instruction word.

_Skip Group_ (5 usec.) skp Y Operation Code 64

This group of instructions senses the state of various flip-flops and switches in the machine. It does not require any reference to memory.

The address portion of the instruction selects the particular function to be sensed. All members of this group have the same operation code.

_Skip on ZERO Acc.u.mulator_ (5 usec.) sza Address 100

If the Acc.u.mulator is equal to plus ZERO (all bits are ZERO) the Program Counter is advanced one extra position and the next instruction in the sequence is skipped.

_Skip on Plus Acc.u.mulator_ (5 usec.) spa Address 200

If the sign bit of the Acc.u.mulator is ZERO, the Program Counter is advanced one extra position and the next instruction in the sequence is skipped.

_Skip on Minus Acc.u.mulator_ (5 usec.) sma Address 400

If the sign bit of the Acc.u.mulator is ONE, the Program Counter is advanced one extra position and the next instruction in the sequence is skipped.

_Skip on ZERO Overflow_ (5 usec.) szo Address 1000

If the overflow flip-flop is a ZERO the Program Counter is advanced one extra position and the next instruction in the sequence will be skipped.

The overflow flip-flop is cleared by this instruction. This flip-flop is set by addition, subtraction, or division that exceeds the capacity of the Acc.u.mulator. The overflow flip-flop is not cleared by arithmetic operations which do not cause an overflow. Thus, a whole series of arithmetic operations may be checked for correctness by a single szo.

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Preliminary Specifications: Programmed Data Processor Model Three Part 3 summary

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